VLSI Design VHDL Semiconductor CMOS Technology FPGA RISC-V Electric EDA Digital Logic ISA Design Sequential Circuits CeNSE IISc Coursera Nano Science RV32I L&T EduTech Maven Silicon Memory Design MPPT Vivado I2C / SPI
CREDENTIALS & TRAINING

Certifications

A curated set of certifications spanning semiconductor device physics, chip design, HDL programming, FPGA architecture, and processor ISA.

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CERTIFICATES
3
ISSUERS
1
DISTINCTION
1
SPECIALISATION
IISc Bengaluru L&T EduTech Maven Silicon
TDI
TMS
INSTITUTE PROGRAMME
Centre for Nano Science and Engineering, IISc Bengaluru
⭐ CERTIFICATE OF DISTINCTION
CeNSE Winter School on Semiconductor Technology
Centre for Nano Science and Engineering, IISc Bengaluru
Online Programme  ·  8th – 19th December 2025
DEC 2025
PROGRAMME SCOPE
An intensive two-week online conference-cum-school organised by IISc's Centre for Nano Science and Engineering, focused on shaping the future of semiconductor technology — covering device physics, nanofabrication, CMOS scaling, and advanced materials.
TOPICS COVERED
Semiconductor device fundamentals · MOSFET scaling and short-channel effects · Nanofabrication techniques · CMOS circuit design · Emerging semiconductor materials · Photonics and optoelectronics · IC packaging and reliability.
ACHIEVEMENT
Awarded Certificate of Distinction — scored above 75% in the programme assessment. Signed by Prof. Ambarish Ghosh, Chair, CeNSE, IISc Bengaluru.
OUTCOME — Recognition of distinction-level performance in a nationally competitive semiconductor school conducted by one of India's premier research institutes. Deepened understanding of device-level semiconductor physics relevant to VLSI design.
Semiconductor Physics CMOS Scaling Nanofabrication MOSFET IISc Bengaluru Certificate of Distinction
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CeNSE Winter School Certificate of Distinction
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TRST
ONLINE SPECIALISATION
L&T EduTech via Coursera
◆ SPECIALISATION — 4 COURSES
Chip-based VLSI Design for Industrial Applications
L&T EduTech via Coursera  ·  Specialisation Certificate
Verify: coursera.org/verify/specialization/52G1UVOM8JOS
SEP 2025
SPECIALISATION SCOPE
A comprehensive 4-course specialisation by L&T EduTech covering VLSI chip design end-to-end — from digital logic fundamentals through CMOS-level chip simulation, VHDL-based circuit design, to FPGA programming for industrial IoT applications.
KEY SKILLS
Digital design fundamentals · Sequential circuits and memory · CMOS technology and IC design principles · VLSI simulation with Electric VLSI EDA Tool · VHDL programming with Xilinx ISE · FPGA architecture with Vivado · RS232 / SPI / I2C protocols · IoT sensor interfacing.
C-01Fundamentals of Digital Design for VLSI Chip Design FEB 2025
C-02VLSI Chip Design and Simulation with Electric VLSI EDA Tool JUN 2025
C-03Design of Digital Circuits with VHDL Programming SEP 2025
C-04FPGA Architecture Based System for Industrial Application SEP 2025
OUTCOME — Completed all 4 courses in the specialisation, earning the full Specialisation Certificate. Gained hands-on design experience from gate-level logic all the way to FPGA-deployed industrial systems.
VLSI Design CMOS IC Design Electric VLSI Tool VHDL FPGA / Vivado Xilinx ISE Coursera
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L&T EduTech Specialisation Certificate
Fundamentals of Digital Design for VLSI Chip Design
L&T EduTech via Coursera  ·  Course 1 of 4
Verify: coursera.org/verify/XBUKDTM9J2Y3
FEB 2025
COURSE CONTENT
Covers the building blocks of digital design for VLSI — number systems, Boolean algebra, combinational and sequential logic design, flip-flops, registers, counters, and an introduction to CMOS-level digital circuits.
SKILLS GAINED
Boolean minimisation (Karnaugh maps) · Combinational circuit design · FSM design · Sequential logic · CMOS gate-level fundamentals · Foundational knowledge for VLSI chip design flows.
Digital Logic Boolean Algebra Sequential Circuits CMOS Basics FSM
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Fundamentals of Digital Design Certificate
VLSI Chip Design and Simulation with Electric VLSI EDA Tool
L&T EduTech via Coursera  ·  Course 2 of 4
Verify: coursera.org/verify/I31QZXH8BGES
JUN 2025
COURSE CONTENT
Hands-on VLSI chip design and simulation using the Electric VLSI EDA Tool — CMOS transistor-level circuit design, schematic capture, layout design, and DRC/ERC verification.
SKILLS GAINED
CMOS cell design · Schematic-to-layout flow · Electric VLSI EDA Tool · DRC / ERC · IC design principles · Parasitic extraction · Layout vs Schematic (LVS) concepts.
Electric VLSI EDA CMOS Layout DRC / ERC Schematic Capture IC Design
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VLSI Chip Design with Electric EDA Certificate
Design of Digital Circuits with VHDL Programming
L&T EduTech via Coursera  ·  Course 3 of 4
Verify: coursera.org/verify/W68JZ5CXZVT4
SEP 2025
COURSE CONTENT
VHDL-based digital circuit design using Xilinx ISE — covers VHDL syntax and programming constructs, design of combinational and sequential circuits, FSM modelling, simulation, and synthesis for FPGA targets.
SKILLS GAINED
VHDL programming · Structural and behavioural modelling · Xilinx ISE · RTL simulation · FSM implementation · Synthesis and constraint-driven design for FPGA.
VHDL Xilinx ISE RTL Simulation FSM Modelling FPGA Synthesis
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Design of Digital Circuits with VHDL Certificate
FPGA Architecture Based System for Industrial Application
L&T EduTech via Coursera  ·  Course 4 of 4
Verify: coursera.org/verify/4218BOQANGX9
SEP 2025
COURSE CONTENT
FPGA architecture and industrial system design using Vivado — CLBs, LUTs, BRAMs, and DSP blocks; implementing communication protocols (RS232, SPI, I2C); sensor interfacing and IoT solution deployment on FPGA hardware.
SKILLS GAINED
Vivado design suite · FPGA architecture (CLB, LUT, BRAM, DSP) · RS232 / SPI / I2C protocols · Sensor interfacing · Industrial IoT on FPGA · Constraint-driven implementation and timing closure.
FPGA Vivado RS232 / SPI / I2C Sensor Interfacing Industrial IoT
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FPGA Architecture Based System Certificate
WEN
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INDUSTRY TRAINING
Maven Silicon — Centre of Excellence in Semiconductor
RISC-V Processor — RV32I Base ISA
Maven Silicon  ·  Certificate of Completion  ·  MSUID: 9345688855
Online Course  ·  RISC-V Training Partner
FEB 2025
COURSE CONTENT
In-depth study of the RISC-V RV32I base integer instruction set architecture — instruction encoding formats (R/I/S/B/U/J), register file, ALU operations, memory access instructions (load/store), branching, and the complete datapath for a 32-bit RISC-V processor.
SKILLS GAINED
RISC-V ISA specification · RV32I instruction encoding · Single-cycle and pipelined processor design concepts · Assembly programming · Datapath and control unit design · Maven Silicon's RISC-V curriculum (industry-standard training partner).
RELEVANCE
RISC-V is an open-standard ISA central to modern chip design research and tape-outs. This certification provides the processor architecture foundation directly applicable to RTL design, synthesis, and custom ASIC research.
OUTCOME — Solid grounding in RISC-V processor architecture from a recognised industry training institute. Directly complemented ongoing RTL and physical design project work with processor-level architectural knowledge.
RISC-V RV32I ISA Processor Architecture Datapath Design Maven Silicon Assembly Programming
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RISC-V RV32I Base ISA Certificate
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